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https://github.com/ggml-org/llama.cpp.git
synced 2026-09-27 16:37:29 -05:00
opencl: add A8 Q6_K non-MoE dp4a binary kernel (#29057)
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@@ -1259,6 +1259,7 @@ struct ggml_backend_opencl_context {
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cl_kernel kernel_gemm_noshuffle_q6_K_f32;
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cl_kernel kernel_gemm_noshuffle_q6_K_f32_cok;
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cl_kernel kernel_gemm_noshuffle_q6_k_f32_32b_trans_ila_a8_bin;
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cl_kernel kernel_gemm_noshuffle_q6_k_q8_1_dp4a_ila_a8_bin;
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cl_kernel kernel_gemv_noshuffle_q6_k_f32_32b_trans;
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cl_kernel kernel_gemv_noshuffle_q5_k_f32;
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cl_kernel kernel_gemv_noshuffle_q5_k_f32_mc3; // multi-column (N=3) verify GEMV (spec/MTP)
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@@ -4407,6 +4408,7 @@ static void load_cl_kernels(ggml_backend_opencl_context *backend_ctx) {
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backend_ctx->kernel_gemv_noshuffle_q6_k_f32_32b_trans = nullptr;
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backend_ctx->kernel_gemm_noshuffle_q6_k_f32_32b_trans_ila_a8_bin = nullptr;
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backend_ctx->kernel_gemm_noshuffle_q6_k_q8_1_dp4a_ila_a8_bin = nullptr;
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if (backend_ctx->adreno_gen == ADRENO_GPU_GEN::X2E) {
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{
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std::string opts = std::string("-cl-std=") + opencl_c_std +
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@@ -4439,6 +4441,17 @@ static void load_cl_kernels(ggml_backend_opencl_context *backend_ctx) {
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CL_CHECK(clReleaseProgram(bin_prog));
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GGML_LOG_CONT(".");
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}
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kernel_bin = (const char *)backend_ctx->get_adreno_bin_kernel("gemm_noshuffle_q6_k_q8_1_dp4a_ila_a8", &bin_size);
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if (kernel_bin && bin_size > 0) {
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cl_program bin_prog =
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build_program_from_binary(backend_ctx->context, backend_ctx->device, kernel_bin, "", bin_size);
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CL_CHECK((backend_ctx->kernel_gemm_noshuffle_q6_k_q8_1_dp4a_ila_a8_bin =
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clCreateKernel(bin_prog, "kernel_gemm_noshuffle_q6_k_q8_1_dp4a_ila_a8", &err), err));
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CL_CHECK(clReleaseProgram(bin_prog));
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GGML_LOG_CONT(".");
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}
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}
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}
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@@ -21919,6 +21932,74 @@ static void ggml_cl_mul_mat_q6_K_f32_adreno_ila(ggml_backend_t backend, const gg
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const int gemm_tile_n = 64;
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int N_pad = CEIL_DIV(N, gemm_tile_n) * gemm_tile_n;
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static const char * q6_k_bin_dp4a_env = getenv("GGML_OPENCL_Q6_K_BIN_DP4A");
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bool q6_k_bin_dp4a_on = q6_k_bin_dp4a_env
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? (atoi(q6_k_bin_dp4a_env) != 0)
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: true;
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// dot prod has to be available
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q6_k_bin_dp4a_on = backend_ctx->has_integer_dot && q6_k_bin_dp4a_on;
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if (q6_k_bin_dp4a_on && backend_ctx->kernel_gemm_noshuffle_q6_k_q8_1_dp4a_ila_a8_bin) {
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const int dp4a_N_pad = CEIL_DIV(N, 32) * 32;
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const size_t n_blocks = (size_t)dp4a_N_pad * (K / 32);
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backend_ctx->prealloc_moe_qa.allocate(context, (size_t)dp4a_N_pad * K * sizeof(cl_char));
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backend_ctx->prealloc_moe_da.allocate(context, n_blocks * sizeof(cl_half));
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backend_ctx->prealloc_moe_sa.allocate(context, n_blocks * sizeof(cl_half));
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cl_mem b_sub = nullptr;
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region.origin = offset1;
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region.size = (size_t)K * N * sizeof(float);
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CL_CHECK((b_sub = clCreateSubBuffer(extra1->data_device, 0, CL_BUFFER_CREATE_TYPE_REGION, ®ion, &err), err));
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cl_int tb = (cl_int)((size_t)N * (K / 32));
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cl_kernel qk = backend_ctx->kernel_quant_a_q8_1;
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CL_CHECK(clSetKernelArg(qk, 0, sizeof(cl_mem), &b_sub));
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CL_CHECK(clSetKernelArg(qk, 1, sizeof(cl_mem), &backend_ctx->prealloc_moe_qa.buffer));
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CL_CHECK(clSetKernelArg(qk, 2, sizeof(cl_mem), &backend_ctx->prealloc_moe_da.buffer));
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CL_CHECK(clSetKernelArg(qk, 3, sizeof(cl_mem), &backend_ctx->prealloc_moe_sa.buffer));
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CL_CHECK(clSetKernelArg(qk, 4, sizeof(cl_int), &tb));
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size_t q_local[1] = { 64 };
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size_t q_global[1] = { (size_t)CEIL_DIV(tb, 64) * 64 };
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backend_ctx->enqueue_ndrange_kernel(qk, 1, q_global, q_local, dst);
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cl_mem d_sub = nullptr;
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cl_mem d_img = nullptr;
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region.origin = offsetd;
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region.size = (size_t)M * N * sizeof(float);
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CL_CHECK((d_sub = clCreateSubBuffer(extrad->data_device, 0, CL_BUFFER_CREATE_TYPE_REGION, ®ion, &err), err));
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img_fmt = { CL_R, CL_FLOAT };
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memset(&img_desc, 0, sizeof(img_desc));
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img_desc.image_type = CL_MEM_OBJECT_IMAGE1D_BUFFER;
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img_desc.image_width = (size_t)M * N;
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img_desc.buffer = d_sub;
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CL_CHECK((d_img = clCreateImage(context, CL_MEM_WRITE_ONLY, &img_fmt, &img_desc, NULL, &err), err));
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kernel = backend_ctx->kernel_gemm_noshuffle_q6_k_q8_1_dp4a_ila_a8_bin;
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cl_uint k_arg = 0;
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CL_CHECK(clSetKernelArg(kernel, k_arg++, sizeof(cl_mem), &extra0_q6_K->ql_img));
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CL_CHECK(clSetKernelArg(kernel, k_arg++, sizeof(cl_mem), &extra0_q6_K->qh));
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CL_CHECK(clSetKernelArg(kernel, k_arg++, sizeof(cl_mem), &extra0_q6_K->s));
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CL_CHECK(clSetKernelArg(kernel, k_arg++, sizeof(cl_mem), &extra0_q6_K->d));
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CL_CHECK(clSetKernelArg(kernel, k_arg++, sizeof(cl_mem), &backend_ctx->prealloc_moe_qa.buffer));
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CL_CHECK(clSetKernelArg(kernel, k_arg++, sizeof(cl_mem), &backend_ctx->prealloc_moe_da.buffer));
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CL_CHECK(clSetKernelArg(kernel, k_arg++, sizeof(cl_mem), &d_img));
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CL_CHECK(clSetKernelArg(kernel, k_arg++, sizeof(int), &K));
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CL_CHECK(clSetKernelArg(kernel, k_arg++, sizeof(int), &M));
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CL_CHECK(clSetKernelArg(kernel, k_arg++, sizeof(int), &N));
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size_t local_work_size[3] = { 64, 1, 1 };
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size_t global_work_size[3] = { 64, (size_t)(M / 64), (size_t)(dp4a_N_pad / 32) };
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backend_ctx->enqueue_ndrange_kernel(kernel, 3, global_work_size, local_work_size, dst);
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CL_CHECK(clReleaseMemObject(b_sub));
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CL_CHECK(clReleaseMemObject(d_img));
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CL_CHECK(clReleaseMemObject(d_sub));
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return;
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}
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cl_mem b_sub_buf = nullptr;
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cl_mem b_padded = nullptr;
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cl_mem b_buf = nullptr;
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