mirror of
https://github.com/ggml-org/whisper.cpp.git
synced 2026-07-23 11:10:57 -05:00
363 lines
12 KiB
C++
363 lines
12 KiB
C++
#pragma once
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#include "llama-kv-cache.h"
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#include "llama-kv-cache-iswa.h"
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#include <map>
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#include <memory>
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#include <unordered_map>
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#include <vector>
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class llama_dsv4_comp_state {
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public:
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llama_dsv4_comp_state(
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const llama_model & model,
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bool offload,
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bool unified,
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uint32_t n_seq_max,
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uint32_t ratio,
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uint32_t state_size,
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uint32_t n_embd_state,
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const char * name,
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const llama_memory_i::layer_filter_cb & filter);
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void clear(bool data);
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uint32_t get_ratio() const;
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uint32_t get_state_size() const;
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uint32_t get_n_stream() const;
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std::map<ggml_backend_buffer_type_t, size_t> memory_breakdown() const;
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void state_write(llama_io_write_i & io, llama_seq_id seq_id, llama_state_seq_flags flags) const;
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void state_read (llama_io_read_i & io, llama_seq_id seq_id, llama_state_seq_flags flags);
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ggml_tensor * get_kv (ggml_context * ctx, int32_t il) const;
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ggml_tensor * get_score(ggml_context * ctx, int32_t il) const;
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ggml_tensor * cpy_kv (ggml_context * ctx, ggml_tensor * cur, ggml_tensor * idxs, int32_t il) const;
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ggml_tensor * cpy_score(ggml_context * ctx, ggml_tensor * cur, ggml_tensor * idxs, int32_t il) const;
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private:
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struct layer {
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uint32_t il;
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ggml_tensor * kv;
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ggml_tensor * score;
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};
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const uint32_t ratio;
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const uint32_t state_size;
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const uint32_t n_embd_state;
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const uint32_t n_stream;
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std::vector<std::pair<ggml_context_ptr, ggml_backend_buffer_ptr>> ctxs_bufs;
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std::vector<layer> layers;
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std::unordered_map<int32_t, int32_t> map_layer_ids;
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size_t total_size() const;
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};
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//
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// llama_kv_cache_dsv4
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//
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// DSV4 uses a normal raw/SWA token cache plus compressed K-only block caches.
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// The compressed caches are storage only; DSV4-specific visibility and block
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// planning are handled by llama_kv_cache_dsv4_context / llm_graph_input_dsv4.
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class llama_kv_cache_dsv4 : public llama_memory_i {
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public:
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llama_kv_cache_dsv4(
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const llama_model & model,
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ggml_type type_k,
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ggml_type type_v,
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bool v_trans,
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bool offload,
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bool swa_full,
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bool unified,
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uint32_t kv_size,
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uint32_t n_seq_max,
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uint32_t n_ubatch,
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uint32_t n_pad,
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const layer_filter_cb & filter,
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const layer_reuse_cb & reuse);
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~llama_kv_cache_dsv4() = default;
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//
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// llama_memory_i
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//
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llama_memory_context_ptr init_batch(
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llama_batch_allocr & balloc,
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uint32_t n_ubatch,
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bool embd_all) override;
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llama_memory_context_ptr init_full() override;
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llama_memory_context_ptr init_update(llama_context * lctx, bool optimize) override;
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bool get_can_shift() const override;
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void clear(bool data) override;
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bool seq_rm (llama_seq_id seq_id, llama_pos p0, llama_pos p1) override;
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void seq_cp (llama_seq_id seq_id_src, llama_seq_id seq_id_dst, llama_pos p0, llama_pos p1) override;
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void seq_keep(llama_seq_id seq_id) override;
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void seq_add (llama_seq_id seq_id, llama_pos p0, llama_pos p1, llama_pos shift) override;
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void seq_div (llama_seq_id seq_id, llama_pos p0, llama_pos p1, int d) override;
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llama_pos seq_pos_min(llama_seq_id seq_id) const override;
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llama_pos seq_pos_max(llama_seq_id seq_id) const override;
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std::map<ggml_backend_buffer_type_t, size_t> memory_breakdown() const override;
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void state_write(llama_io_write_i & io, llama_seq_id seq_id = -1, llama_state_seq_flags flags = 0) const override;
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void state_read (llama_io_read_i & io, llama_seq_id seq_id = -1, llama_state_seq_flags flags = 0) override;
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//
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// llama_kv_cache_dsv4 specific API
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//
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llama_kv_cache_iswa * get_raw() const;
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llama_kv_cache * get_csa() const;
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llama_kv_cache * get_hca() const;
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llama_kv_cache * get_lid() const;
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llama_dsv4_comp_state * get_csa_state() const;
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llama_dsv4_comp_state * get_hca_state() const;
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llama_dsv4_comp_state * get_lid_state() const;
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private:
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llama_hparams hparams_raw;
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llama_hparams hparams_csa;
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llama_hparams hparams_hca;
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llama_hparams hparams_lid;
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const uint32_t n_seq_max;
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std::unique_ptr<llama_kv_cache_iswa> kv_raw;
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std::unique_ptr<llama_kv_cache> kv_csa;
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std::unique_ptr<llama_kv_cache> kv_hca;
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std::unique_ptr<llama_kv_cache> kv_lid;
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std::unique_ptr<llama_dsv4_comp_state> csa_state;
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std::unique_ptr<llama_dsv4_comp_state> hca_state;
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std::unique_ptr<llama_dsv4_comp_state> lid_state;
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void clear_compressed(bool data);
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};
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// DSV4 raw attention only uses the SWA half of kv_raw. The base half is kept
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// for generic ISWA bookkeeping, but it has no DSV4 layers to expose here.
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class llama_kv_cache_dsv4_raw_context : public llama_memory_context_i {
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public:
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using slot_info_vec_t = llama_kv_cache::slot_info_vec_t;
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llama_kv_cache_dsv4_raw_context(llama_kv_cache_iswa * kv);
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llama_kv_cache_dsv4_raw_context(
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llama_kv_cache_iswa * kv,
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llama_context * lctx,
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bool optimize);
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llama_kv_cache_dsv4_raw_context(
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llama_kv_cache_iswa * kv,
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slot_info_vec_t sinfos_base_write,
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slot_info_vec_t sinfos_swa_write,
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slot_info_vec_t sinfos_swa_read,
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std::vector<llama_ubatch> ubatches,
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std::vector<llama_ubatch> ubatches_write);
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bool next() override;
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bool apply() override;
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llama_memory_status get_status() const override;
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const llama_ubatch & get_ubatch() const override;
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uint32_t get_n_kv() const;
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uint32_t get_n_write() const;
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ggml_tensor * get_k(ggml_context * ctx, int32_t il) const;
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ggml_tensor * cpy_k(ggml_context * ctx, ggml_tensor * k_cur, ggml_tensor * k_idxs, int32_t il) const;
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ggml_tensor * build_input_k_idxs(ggml_context * ctx, const llama_ubatch & ubatch) const;
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ggml_tensor * build_input_k_rot(ggml_context * ctx) const;
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void set_input_k_idxs(ggml_tensor * dst) const;
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void set_input_kq_mask(ggml_tensor * dst, const llama_ubatch * ubatch, bool causal_attn) const;
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void set_input_k_rot(ggml_tensor * dst) const;
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private:
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size_t i_next = 0;
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llama_kv_cache * kv_swa = nullptr;
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slot_info_vec_t sinfos_write;
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slot_info_vec_t sinfos_read;
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std::vector<llama_ubatch> ubatches;
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std::vector<llama_ubatch> ubatches_write;
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const llama_memory_context_ptr ctx_base_mem;
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const llama_memory_context_ptr ctx_swa_mem;
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uint32_t n_kv = 0;
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const llama_memory_status status;
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};
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// DSV4 compressed KV rows are graph outputs, not normal token KV writes.
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// Keep a small context that exposes K tensors without generic apply() semantics.
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class llama_kv_cache_dsv4_comp_context {
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public:
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using slot_info_vec_t = llama_kv_cache::slot_info_vec_t;
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llama_kv_cache_dsv4_comp_context(llama_kv_cache * kv);
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llama_kv_cache_dsv4_comp_context(
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llama_kv_cache * kv,
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slot_info_vec_t sinfos,
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std::vector<llama_ubatch> ubatches);
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bool next();
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uint32_t get_n_kv() const;
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ggml_tensor * get_k(ggml_context * ctx, int32_t il) const;
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ggml_tensor * cpy_k(ggml_context * ctx, ggml_tensor * k_cur, ggml_tensor * k_idxs, int32_t il) const;
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ggml_tensor * build_input_k_rot(ggml_context * ctx) const;
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void set_input_k_rot(ggml_tensor * dst) const;
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private:
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llama_kv_cache * kv;
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size_t i_cur = 0;
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slot_info_vec_t sinfos;
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std::vector<llama_ubatch> ubatches;
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uint32_t n_kv;
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};
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class llama_kv_cache_dsv4_context : public llama_memory_context_i {
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public:
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using slot_info_vec_t = llama_kv_cache::slot_info_vec_t;
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struct comp_plan {
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// Per-ubatch recipe for updating compressor state, committing completed
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// compressed rows, and masking the compressed attention source.
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// APE row ids, i.e. pos % ratio, for the compressor-state updates.
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std::vector<int32_t> state_pos;
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// Current-ubatch source row ids and unique persistent-state
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// destination row ids for deterministic ring-state updates.
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std::vector<int32_t> state_persist_src_idxs;
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std::vector<int32_t> state_persist_dst_idxs;
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// Flattened source row ids used for state-backed commits. Source rows
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// index the graph-local [persistent_state | current_ubatch_scratch]
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// tensor. For overlapped compression the first half is previous rows
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// and the second half is current rows; a final synthetic zero/-inf row
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// may be addressed for the first block's previous half.
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std::vector<int32_t> state_read_idxs;
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// Final compressed-cache row ids written by state-backed commits.
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// A non-boundary CSA/LID decode step can target a masked scratch row.
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std::vector<int64_t> state_write_idxs;
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// RoPE positions for state-backed commits.
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std::vector<int32_t> state_write_pos;
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// Number of completed compressed rows visible for each query token.
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std::vector<int32_t> n_visible;
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// Number of streams used by the attention graph for this ubatch.
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int64_t n_stream = 1;
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// Graph-width for compressed rows. This can be larger than n_visible
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// so masked padding rows do not force a new graph at every CSA block.
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int64_t n_kv = 0;
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};
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llama_kv_cache_dsv4_context(llama_memory_status status);
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llama_kv_cache_dsv4_context(
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llama_kv_cache_dsv4 * kv);
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llama_kv_cache_dsv4_context(
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llama_kv_cache_dsv4 * kv,
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llama_context * lctx,
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bool optimize);
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llama_kv_cache_dsv4_context(
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llama_kv_cache_dsv4 * kv,
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slot_info_vec_t sinfos_raw_base_write,
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slot_info_vec_t sinfos_raw_swa_write,
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slot_info_vec_t sinfos_raw_swa_read,
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std::vector<llama_ubatch> ubatches,
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std::vector<llama_ubatch> ubatches_raw);
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virtual ~llama_kv_cache_dsv4_context();
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//
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// llama_memory_context_i
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//
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bool next() override;
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bool apply() override;
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llama_memory_status get_status() const override;
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const llama_ubatch & get_ubatch() const override;
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//
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// llama_kv_cache_dsv4_context specific API
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//
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const llama_kv_cache_dsv4_raw_context * get_raw() const;
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const llama_kv_cache_dsv4_comp_context * get_csa() const;
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const llama_kv_cache_dsv4_comp_context * get_hca() const;
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const llama_kv_cache_dsv4_comp_context * get_lid() const;
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const llama_dsv4_comp_state * get_csa_state() const;
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const llama_dsv4_comp_state * get_hca_state() const;
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const llama_dsv4_comp_state * get_lid_state() const;
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const comp_plan & get_csa_plan() const;
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const comp_plan & get_hca_plan() const;
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const comp_plan & get_lid_plan() const;
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const comp_plan & get_csa_plan(const llama_ubatch & ubatch) const;
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const comp_plan & get_hca_plan(const llama_ubatch & ubatch) const;
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const comp_plan & get_lid_plan(const llama_ubatch & ubatch) const;
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private:
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size_t i_next = 0;
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std::vector<llama_ubatch> ubatches;
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std::vector<comp_plan> plans_csa;
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std::vector<comp_plan> plans_hca;
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std::vector<comp_plan> plans_lid;
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const std::unique_ptr<llama_kv_cache_dsv4_raw_context> ctx_raw;
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const llama_memory_context_ptr ctx_csa_mem;
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const llama_memory_context_ptr ctx_hca_mem;
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const llama_memory_context_ptr ctx_lid_mem;
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const std::unique_ptr<llama_kv_cache_dsv4_comp_context> ctx_csa;
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const std::unique_ptr<llama_kv_cache_dsv4_comp_context> ctx_hca;
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const std::unique_ptr<llama_kv_cache_dsv4_comp_context> ctx_lid;
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const llama_dsv4_comp_state * csa_state = nullptr;
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const llama_dsv4_comp_state * hca_state = nullptr;
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const llama_dsv4_comp_state * lid_state = nullptr;
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bool reserve_plans = false;
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mutable comp_plan reserve_plan_csa;
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mutable comp_plan reserve_plan_hca;
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mutable comp_plan reserve_plan_lid;
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const llama_memory_status status;
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};
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